The clock frequency output by an oscillator plays an extremely important role in a digital circuit. Different systems have different requirements for the clock frequency. If a very stable and accurate frequency is required, a quartz oscillator is usually adopted as the reference source for the reference clock. This is because the error in the frequency of a quartz oscillator is extremely small. Besides, the influence of temperature of the oscillating frequency is also very small. Nonetheless, the use of the quartz oscillator increases the overall system cost. If a sufficiently accurate (capable of calibrating to a certain accuracy) oscillator can be implemented in a chip and the drift of the oscillating frequency by temperature is small enough, then the quartz oscillator can be substituted. In addition to reducing the cost of quartz oscillator, a product can be made even smaller because the printed circuit board is shrunk. For high-end products requiring extremely accurate frequency, a quartz oscillator is unavoidable. One the other hand, for low-end products less requiring the quality of the frequency, an accurate built-in oscillator becomes a decent choice.
A general oscillator having temperature and process compensation contains the circuit for compensating temperature and process variations. FIG. 1 shows a circuit diagram of the process and temperature compensation circuit according to the prior art. The circuit will provide the suitable driving voltage VCTRL to the subsequent bias circuit according to the process and temperature drifts. The bias circuit will produces a first driving voltage VBP and a second driving voltage VBN to the oscillating circuit according to the driving voltage VCTRL. Thereby, under process and temperature drifts, the oscillating circuit can have the proper biasing point and thus oscillating at a fixed frequency. As for the oscillating circuit, it is implemented by using three or more stages of delay buffer connected in series. FIG. 2 shows a circuit diagram of the delay buffer according to the prior art. The delay buffer according to the prior art comprises a current source 10′, a first transistor 20′, a first symmetric load 30′, a second transistor 40′, and a second symmetric load 50′. The current source 10′ produces a bias current ID according to the second control signal VBN. The first transistor 20′ is coupled to the current source 10′ and receives a first signal V+. The first symmetric load 30′ is coupled to the first transistor 20′ and receives a power supply VDD. The second transistor 40′ is coupled to the current source 10′ and receives a second signal V−. The second symmetric load 50′ is coupled to the second transistor 40′ and receives power supply VDD. The first symmetric load 30′ includes a third transistor 32′ and a fourth transistor 34′, while the second symmetric load 50′ includes a fifth transistor 52′ and a sixth transistor 54′. The equivalent resistance of the first symmetric load 30′ and the second symmetric load 50′, namely, the third, fourth, fifth, and sixth transistors 32′, 34′, 52′, 54′, is approximated by:REQ=(VDD−VBP)/ID  (1)where the first control signal VBP is equal to the driving voltage VCTRL output by the driving circuit for temperature and process variations. Thereby, the above equation (1) can be rewritten as:REQ=(VDD−VCTRL)/ID  (2)where the bias current ID is determined by the second control signal VBN produced by the bias circuit according to the driving voltage VCTRL. The value of the bias current ID is approximated by:ID≅K′54′×(W54′/L54′)×(VDD−|VT54′|−VCTRL)2  (3)In addition, the delay time of the delay buffer is:TD=REQ×CO=CO×(VDD−VCTRL)/ID  (4)where CO is the sum of the parasitic capacitors in the delay buffer. If there are N stages of delay buffers, the oscillating frequency will be:
                                                        f              =                            ⁢                              1                /                                  (                                      N                    ×                                          T                      D                                                        )                                                                                                        =                            ⁢                                                I                  D                                /                                  [                                      N                    ×                                          C                      O                                        ×                                          (                                                                        V                          DD                                                -                                                  V                          CTRL                                                                    )                                                        ]                                                                                                        =                            ⁢                                                [                                                            K                                              54                        ′                                            ′                                        ×                                          (                                                                        W                                                      54                            ′                                                                          /                                                  L                                                      54                            ′                                                                                              )                                        ×                                                                  (                                                                              V                            DD                                                    -                                                                                                                V                                                              T                                ⁢                                                                                                                                  ⁢                                                                  54                                  ′                                                                                                                                                                          -                                                      V                            CTRL                                                                          )                                            2                                                        ]                                /                                                                                                      ⁢                              [                                  N                  ×                                      C                    O                                    ×                                      (                                                                  V                        DD                                            -                                              V                        CTRL                                                              )                                                  ]                                                                        (        5        )            For the oscillating frequency f not to vary with process and temperature drifts, the driving voltage VCTRL must satisfy the following condition:
                              V          CTRL                =                              V            DD                    -                                  VTP                                -                                    1              2                        ⁢                                          f                ·                N                ·                                  C                  O                                                                              K                  54                  ′                                ×                                  (                                                            W                                              54                        ′                                                              /                                          L                                              54                        ′                                                                              )                                                              -                                    1              2                        ⁢                                                            4                  ·                                                          VTP                                                        ·                                                            f                      ·                      N                      ·                                              C                        O                                                                                                            K                        54                        ′                                            ×                                              (                                                                              W                                                          54                              ′                                                                                /                                                      L                                                          54                              ′                                                                                                      )                                                                                            +                                                      (                                                                  f                        ·                        N                        ·                                                  C                          O                                                                                                                      K                          54                          ′                                                ×                                                  (                                                                                    W                                                              54                                ′                                                                                      /                                                          L                                                              54                                ′                                                                                                              )                                                                                      )                                    2                                                                                        (        6        )            The driving circuit in FIG. 1 is designed according to the above driving signal VCTRL. The amplitude of the bias current IB and the temperature coefficient will influence the oscillating frequency. The voltage VC1 produced by the transistor MC3 depends on the threshold voltage |VTP|. Accordingly, the threshold voltage of the p-type transistor can be deduced. Nonetheless, because the voltage VC1 is too low, the voltage VC1 should be amplified to the voltage VC2 by using the amplifier and the resistors RC2, RC1. Then the transistor QC1 is used for detecting the temperature. Besides, select a suitable size of the transistor MC4 along with the resistor RC3 to produce the driving signal VCTRL. However, the circuit is complicated and uneasy to control owing to too many variables.
Accordingly, the present invention provides a novel oscillating device, which can produce an accurate oscillating frequency not drifting significantly with temperature drift. The problem described above can thus be solved.